| Spécialité | Informatique temps réel, robotique et automatique - Fontainebleau |
| Ecole doctorale | Ingénierie des Systèmes, Matériaux, Mécanique, Énergétique |
| Directeur de thèse | JOUVELOT Pierre |
| Co-directeur | MEMMI Gérard |
| Unité de recherche | Mathématiques et Systèmes |
| Contact | |
| Date de validité | 01/10/2020 |
| Site Web | |
| Mots-clés | modélisation, expérimentation modeling, experimentation |
| Résumé | Voir présentation en anglais The proposed PhD research agenda is to build upon the detailed core modeling and data-based foundations developed at Télécom ParisTech and MINES ParisTech to look for both static and dynamic compilation optimizations that are able to handle systems' power-energy-temperature tradeoffs. |
| Contexte | Embedded systems operate in application domains that often impose stringent and sometimes contradictory constraints, in particular in terms of CPU usage, energy consumption, power requirements or environmental conditions (mostly temperature). Of course, all these factors are closely intertwined, making data-based implementation decisions complex and challenging and highly goal-dependent (see, e.g., [Cebrian]). Optimizing this set of constraints (i.e., producing code that at the same time is frugal in energy and meets its constraints in terms of performance) is of paramount importance, especially in mobile embedded systems where batteries must be used with parsimony.
Over the last five years, these key issues for embedded computing systems have been at the core of research efforts at Télécom ParisTech, in collaboration with MINES ParisTech. Among the most significant results of these endeavors are:
(a) the setup of a dedicated experimental platform for the detailed analysis of embedded CPU performance [Vaddina et al],
(b) the modeling and experimental validation of the Energy/Frequency Convexity Rule [de Vogeleer et al], which links, in a large number of actual processors, the energy consumption of CPU-bound kernels with clock frequency and
(c) a recent proposal for a temperature-aware extension of this model. |
| Encadrement | Encadrement conjoint entre les deux institutions (MINES ParisTech et Télécom ParisTech).
Contacter pierre.jouvelot@mines-paristech.fr pour toute question. |
| Profil candidat | Voir ci-dessous The candidate will have a strong background in compilation principles and system programming (C, C++). Some knowledge in machine learning and/or physics modelling would be appreciated. Some understanding of hardware architecture and/or hands-on practice of measurement technologies (LabVIEW, NI sensors...) would be a plus. |
| Résultat attendu | A possible research agenda would be as follows:
- bibliographic analysis of the (rich) scientific literature regarding power-aware, energy-aware and temperature-aware profiling and compilation techniques (see, e.g., [Mittal][Sabry][Marcu]);
- analyze existing embedded-system- or Internet-of-Things-specific benchmarks to provide detailed profiles of energy consumption and compile-time and run-time metrics, taking into account the ambient temperature;
- build upon this profile information to characterize/cluster future applications (or kernels), using Machine Learning techniques or other statistical tools;
- build upon both application-dependent and model information to target existing or new compilation techniques (static or just-in-time) for a given embedded-system code;
- implement and test the proposed optimizations in an existing compilation platform (e.g., GCC or LLVM). |
| Références | - Kameswar Rao Vaddina, Florian Brandner, Gérard Memmi, Pierre Jouvelot. Experimental energy profiling of energy-critical embedded applications. SoftCOM 2017: 1-6
- Karel De Vogeleer, Gérard Memmi, Pierre Jouvelot, Fabien Coelho. The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices. PPAM (1) 2013: 793-803
- Sparsh Mittal. A survey of techniques for improving energy efficiency in embedded computing systems. International Journal of Computer Aided Engineering and Technology, 2014, 6 (4), pp.440-459.
- Mohamed M. Sabry, José L. Ayala, and David Atienza. 2010. Thermal-aware compilation for system-on-chip processing architectures. In Proceedings of the 20th symposium on Great lakes symposium on VLSI (GLSVLSI '10). ACM, New York, NY, USA, 221-226.
- Marius Marcu. Power–thermal profiling of software applications. Microelectronics Journal 42, no. 4 (2011): 601-608.
- Juan M. Cebrian, Natvig Lasse. Temperature effects on on-chip energy measurements. 2013 International Green Computing Conference (IGCC), pp. 1-6. IEEE, 2013 |
| Type financement | Concours pour un contrat doctoral |
